Design Linked Incentive Scheme

The Design Linked Incentive Scheme supports the creation of semiconductor designs and intellectual property within India. It provides financial incentives and design infrastructure for developing and deploying integrated circuits, chipsets, systems-on-chips, systems and semiconductor IP cores.

Core objective

The scheme seeks to strengthen India’s domestic semiconductor design ecosystem by enabling Indian companies, start-ups and micro, small and medium enterprises to move from design ideas to commercially deployed products.

• It promotes indigenous semiconductor design and greater domestic ownership of intellectual property.
• It supports multiple stages of design, including development, prototyping, validation and commercial deployment.
• It aims to help domestic design firms overcome the high cost of specialised tools and product development.

How the scheme pursues the objective

The scheme combines access to design infrastructure with incentives linked to product development and market deployment.

• Chip Design Infrastructure Support provides access to tools and facilities required for semiconductor design and validation.
• The Product Design Linked Incentive reimburses up to 50 per cent of eligible expenditure, subject to a ceiling of Rs 15 crore per application.
• The Deployment Linked Incentive provides 6 per cent to 4 per cent of net sales turnover over five years, subject to a ceiling of Rs 30 crore per application.

Institutional and strategic significance

The scheme is implemented by the Ministry of Electronics and Information Technology, with C-DAC as the nodal agency. By supporting design capability and commercialisation, it complements broader efforts to build a semiconductor ecosystem covering design, fabrication, packaging and related capabilities.